Tue 6 Nov 2018 09:15 - 09:30 at Cabot - AI SEPS Chair(s): Yukinori Sato, Ali Jannesari

Field Programmable Gate Arrays, FPGAs, are a widely available configurable hardware design that is commonly used in many domain-specific applications. However, the complexity of its programming interface is currently restricting its usage to highly qualified programmers dedicated to FPGA. In order to democratize FPGAs, many efforts are concentrating on High-Level Synthesis, HLS: the process of compiling a more general language. In that context we propose in this paper PyGA, a proof of concept of a Python to FPGA compiler based on the Numba Just-In-Time (JIT) compiler for Python and the Intel FPGA SDK for OpenCL. It allows any Python user to use a FPGA card as an accelerator for Python seamlessly. As expected, early performance results are encouraging, but not competitive with compiled CPU version. It emphasis that, to avoid overhead that cannot be compensated otherwise, tightly coupled accelerator design such as Intel Xeon+FPGA are necessary to address larger code base with finer grain kernel. It also shows that HLS compilation and runtime efforts remains to be done to be competitive with modern multi-core CPUs.

Tue 6 Nov

08:00 - 10:00: AI-SEPS - AI SEPS at Cabot
Chair(s): Yukinori SatoToyohashi University of Technology, Ali JannesariIowa State University
seps-2018-papers08:00 - 08:50
PrabhatNERSC, Berkeley Lab
seps-2018-papers08:50 - 09:15
Jan-Patrick LehrGraduate School of Computational Engineering, TU Darmstadt, Alexander HückInstitute for Scientific Computing, TU Darmstadt, Christian BischofScientific Computing, TU Darmstadt
seps-2018-papers09:15 - 09:30
Yohann UguenUniv Lyon, INSA Lyon, Inria, CITI, Eric PetitIntel, France
seps-2018-papers09:30 - 10:00
Yukinori SatoToyohashi University of Technology, Ali JannesariIowa State University, Shigeru ChibaThe University of Tokyo